Language VHDL
Date: | 04/20/05 |
Author: | F. J. Ludicky |
URL: | n/a |
Comments: | 4 |
Info: | n/a |
Score: | ![]() |
-- This is the VHDL (ANSI/IEEE Std 1076 - 1993) -- version of the beer song. -- F. J. Ludicky, Sundstrand Aerospace entity beer_song is port(bottles: out integer; words: out string(1 to 28); start_singing: in boolean); end beer_song; architecture silly of beer_song is begin lets_sing: process begin wait on start_singing until start singing; for index_bottles in 99 downto 1 loop bottles <= index_bottles; words <= "bottles of beer on the wall,"; wait for 5 sec; bottles <= index_bottles; words <= "bottles of beer, "; wait for 5 sec; words <= "take one down, "; wait for 5 sec; words <= "pass it around, "; wait for 5 sec; bottles <= index_bottles - 1; words <= "bottles of beer on the wall." wait for 5 sec. end loop; assert false report "No more beer!" severity warning; end process lets_sing; end silly;
Download Source | Write Comment
Download Source | Write Comment
Add Comment
Please provide a value for the fields Name,
Comment and Security Code.
This is a gravatar-friendly website.
E-mail addresses will never be shown.
Enter your e-mail address to use your gravatar.
Please don't post large portions of code here! Use the form to submit new examples or updates instead!
Comments
any comments and suggestions are welcome to my mailtech_techno1[at]hotmail[dot]com
library ieee;
USE IEEE.STD_LOGIC_1164.ALL;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
ENTITY PWM IS
GENERIC(N :NATURAL:=6);
PORT(DATA : IN STD_LOGIC_VECTOR(0 TO N-1); --used for 6 bit input data value
PWM : OUT STD_LOGIC;
CLK : IN STD_LOGIC; --pwm output pulse
RST:IN STD_LOGIC);
constant AMIN : STD_LOGIC_VECTOR(0 TO N-1):=(OTHERS=>'0');
CONSTANT AMAX : STD_LOGIC_VECTOR(0 TO N-1):=(OTHERS =>'1'); --asynchronous reset and clock
END PWM;
ARCHITECTURE PWM OF PWM IS
SIGNAL TC,PWMD: STD_LOGIC;
SIGNAL ROUT,COUT: STD_LOGIC_VECTOR(0 TO N-1); --ROUT = REG OUTPUT , COUT = COUNTER OUTPUT
BEGIN
--data register
PROCESS(CLK,RST,DATA)
BEGIN
IF RST = '1' THEN
ROUT <= AMIN;
ELSIF ( clk'event and CLK = '1') THEN
ROUT <= DATA;
END IF;
END PROCESS;
--up down counter
PROCESS(ROUT,PWMD,TC,CLK,RST)
BEGIN
IF RST='1' THEN
COUT <= AMIN;
ELSIF ( CLK'event and CLK = '1') THEN
IF TC='1' THEN
COUT <= ROUT ;
ELSIF (TC='0' AND PWMD = '1' AND COUT < AMAX) THEN
COUT<= COUT + '1' ;
ELSIF (TC='0' AND PWMD = '0' AND COUT > AMIN) THEN
COUT<= COUT - '1' ;
END IF ;
END IF ;
END PROCESS ;
--for terminal count condition
PROCESS(RST,CLK,COUT)
BEGIN
IF RST ='1' THEN
TC <= '1' ;
ELSIF ( clk'event and CLK = '1') THEN
IF (COUT <= AMIN OR COUT <= AMAX) THEN
TC <= '1' ;
ELSE TC <= '0' ;
END IF ;
END IF ;
END PROCESS ;
--pwm logic
PROCESS(RST,TC,PWMD)
BEGIN
IF RST = '1' THEN
PWMD <= '0';
ELSIF (tc'event and tc='1') THEN
PWMD <= NOT PWMD ;
ELSE
PWMD <= PWMD ;
END IF ;
END PROCESS ;
PWM <= PWMD;
END PWM ;
report "No more beer!" severity failure;
because that way it will stop the simulator even if something else is still running.
Also, severity failure seems more appropriate for running out of beer.
HDL
http://hdlandldlcholesterol.com/